30 #include <sys/prctl.h>
33 #if !defined(__mips_hard_float) || defined(__mips_single_float)
35 #define SLJIT_IS_FPU_AVAILABLE 0
40 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
42 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
43 return "MIPS32-R6" SLJIT_CPUINFO;
45 return "MIPS64-R6" SLJIT_CPUINFO;
48 #elif (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 5)
50 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
51 return "MIPS32-R5" SLJIT_CPUINFO;
53 return "MIPS64-R5" SLJIT_CPUINFO;
56 #elif (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
58 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
59 return "MIPS32-R2" SLJIT_CPUINFO;
61 return "MIPS64-R2" SLJIT_CPUINFO;
64 #elif (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
66 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
67 return "MIPS32-R1" SLJIT_CPUINFO;
69 return "MIPS64-R1" SLJIT_CPUINFO;
73 return "MIPS III" SLJIT_CPUINFO;
81 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
82 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
83 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
86 #define PIC_ADDR_REG TMP_REG1
91 #define RETURN_ADDR_REG 31
98 0, 2, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 24, 23, 22, 21, 20, 19, 18, 17, 16, 29, 25, 4, 31, 3, 1
101 #define TMP_FREG1 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
102 #define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 2)
103 #define TMP_FREG3 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 3)
105 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
107 static const sljit_u8 freg_map[((SLJIT_NUMBER_OF_FLOAT_REGISTERS + 3) << 1) + 1] = {
109 0, 14, 2, 4, 6, 8, 18, 30, 28, 26, 24, 22, 20,
111 1, 15, 3, 5, 7, 9, 19, 31, 29, 27, 25, 23, 21,
118 0, 0, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 1, 2, 3, 4, 5, 6, 7, 8, 9, 31, 30, 29, 28, 27, 26, 25, 24, 12, 11, 10
127 #define S(s) ((sljit_ins)reg_map[s] << 21)
128 #define T(t) ((sljit_ins)reg_map[t] << 16)
129 #define D(d) ((sljit_ins)reg_map[d] << 11)
130 #define FT(t) ((sljit_ins)freg_map[t] << 16)
131 #define FS(s) ((sljit_ins)freg_map[s] << 11)
132 #define FD(d) ((sljit_ins)freg_map[d] << 6)
134 #define SA(s) ((sljit_ins)(s) << 21)
135 #define TA(t) ((sljit_ins)(t) << 16)
136 #define DA(d) ((sljit_ins)(d) << 11)
137 #define IMM(imm) ((sljit_ins)(imm) & 0xffff)
138 #define SH_IMM(imm) ((sljit_ins)(imm) << 6)
140 #define DR(dr) (reg_map[dr])
141 #define FR(dr) (freg_map[dr])
142 #define HI(opcode) ((sljit_ins)(opcode) << 26)
143 #define LO(opcode) ((sljit_ins)(opcode))
144 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
147 #define CMP_FMT_S (20 << 21)
150 #define FMT_S (16 << 21)
151 #define FMT_D (17 << 21)
153 #define ABS_S (HI(17) | FMT_S | LO(5))
154 #define ADD_S (HI(17) | FMT_S | LO(0))
155 #define ADDIU (HI(9))
156 #define ADDU (HI(0) | LO(33))
157 #define AND (HI(0) | LO(36))
158 #define ANDI (HI(12))
160 #define BAL (HI(1) | (17 << 16))
161 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
162 #define BC1EQZ (HI(17) | (9 << 21) | FT(TMP_FREG3))
163 #define BC1NEZ (HI(17) | (13 << 21) | FT(TMP_FREG3))
165 #define BC1F (HI(17) | (8 << 21))
166 #define BC1T (HI(17) | (8 << 21) | (1 << 16))
169 #define BGEZ (HI(1) | (1 << 16))
172 #define BLTZ (HI(1) | (0 << 16))
174 #define BREAK (HI(0) | LO(13))
175 #define CFC1 (HI(17) | (2 << 21))
176 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
177 #define C_EQ_S (HI(17) | CMP_FMT_S | LO(2))
178 #define C_OLE_S (HI(17) | CMP_FMT_S | LO(6))
179 #define C_OLT_S (HI(17) | CMP_FMT_S | LO(4))
180 #define C_UEQ_S (HI(17) | CMP_FMT_S | LO(3))
181 #define C_ULE_S (HI(17) | CMP_FMT_S | LO(7))
182 #define C_ULT_S (HI(17) | CMP_FMT_S | LO(5))
183 #define C_UN_S (HI(17) | CMP_FMT_S | LO(1))
184 #define C_FD (FD(TMP_FREG3))
186 #define C_EQ_S (HI(17) | FMT_S | LO(50))
187 #define C_OLE_S (HI(17) | FMT_S | LO(54))
188 #define C_OLT_S (HI(17) | FMT_S | LO(52))
189 #define C_UEQ_S (HI(17) | FMT_S | LO(51))
190 #define C_ULE_S (HI(17) | FMT_S | LO(55))
191 #define C_ULT_S (HI(17) | FMT_S | LO(53))
192 #define C_UN_S (HI(17) | FMT_S | LO(49))
195 #define CVT_S_S (HI(17) | FMT_S | LO(32))
196 #define DADDIU (HI(25))
197 #define DADDU (HI(0) | LO(45))
198 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
199 #define DDIV (HI(0) | (2 << 6) | LO(30))
200 #define DDIVU (HI(0) | (2 << 6) | LO(31))
201 #define DMOD (HI(0) | (3 << 6) | LO(30))
202 #define DMODU (HI(0) | (3 << 6) | LO(31))
203 #define DIV (HI(0) | (2 << 6) | LO(26))
204 #define DIVU (HI(0) | (2 << 6) | LO(27))
205 #define DMUH (HI(0) | (3 << 6) | LO(28))
206 #define DMUHU (HI(0) | (3 << 6) | LO(29))
207 #define DMUL (HI(0) | (2 << 6) | LO(28))
208 #define DMULU (HI(0) | (2 << 6) | LO(29))
210 #define DDIV (HI(0) | LO(30))
211 #define DDIVU (HI(0) | LO(31))
212 #define DIV (HI(0) | LO(26))
213 #define DIVU (HI(0) | LO(27))
214 #define DMULT (HI(0) | LO(28))
215 #define DMULTU (HI(0) | LO(29))
217 #define DIV_S (HI(17) | FMT_S | LO(3))
218 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
219 #define DINSU (HI(31) | LO(6))
221 #define DMFC1 (HI(17) | (1 << 21))
222 #define DMTC1 (HI(17) | (5 << 21))
223 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
224 #define DROTR (HI(0) | (1 << 21) | LO(58))
225 #define DROTR32 (HI(0) | (1 << 21) | LO(62))
226 #define DROTRV (HI(0) | (1 << 6) | LO(22))
227 #define DSBH (HI(31) | (2 << 6) | LO(36))
228 #define DSHD (HI(31) | (5 << 6) | LO(36))
230 #define DSLL (HI(0) | LO(56))
231 #define DSLL32 (HI(0) | LO(60))
232 #define DSLLV (HI(0) | LO(20))
233 #define DSRA (HI(0) | LO(59))
234 #define DSRA32 (HI(0) | LO(63))
235 #define DSRAV (HI(0) | LO(23))
236 #define DSRL (HI(0) | LO(58))
237 #define DSRL32 (HI(0) | LO(62))
238 #define DSRLV (HI(0) | LO(22))
239 #define DSUBU (HI(0) | LO(47))
242 #define JALR (HI(0) | LO(9))
243 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
244 #define JR (HI(0) | LO(9))
246 #define JR (HI(0) | LO(8))
251 #define LDC1 (HI(53))
256 #define LWC1 (HI(49))
257 #define MFC1 (HI(17))
258 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
259 #define MFHC1 (HI(17) | (3 << 21))
261 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
262 #define MOD (HI(0) | (3 << 6) | LO(26))
263 #define MODU (HI(0) | (3 << 6) | LO(27))
265 #define MFHI (HI(0) | LO(16))
266 #define MFLO (HI(0) | LO(18))
268 #define MTC1 (HI(17) | (4 << 21))
269 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
270 #define MTHC1 (HI(17) | (7 << 21))
272 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
273 #define MUH (HI(0) | (3 << 6) | LO(24))
274 #define MUHU (HI(0) | (3 << 6) | LO(25))
275 #define MUL (HI(0) | (2 << 6) | LO(24))
276 #define MULU (HI(0) | (2 << 6) | LO(25))
278 #define MULT (HI(0) | LO(24))
279 #define MULTU (HI(0) | LO(25))
281 #define MUL_S (HI(17) | FMT_S | LO(2))
282 #define NEG_S (HI(17) | FMT_S | LO(7))
283 #define NOP (HI(0) | LO(0))
284 #define NOR (HI(0) | LO(39))
285 #define OR (HI(0) | LO(37))
287 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
288 #define ROTR (HI(0) | (1 << 21) | LO(2))
289 #define ROTRV (HI(0) | (1 << 6) | LO(6))
294 #define SDC1 (HI(61))
295 #define SLT (HI(0) | LO(42))
296 #define SLTI (HI(10))
297 #define SLTIU (HI(11))
298 #define SLTU (HI(0) | LO(43))
299 #define SLL (HI(0) | LO(0))
300 #define SLLV (HI(0) | LO(4))
301 #define SRL (HI(0) | LO(2))
302 #define SRLV (HI(0) | LO(6))
303 #define SRA (HI(0) | LO(3))
304 #define SRAV (HI(0) | LO(7))
305 #define SUB_S (HI(17) | FMT_S | LO(1))
306 #define SUBU (HI(0) | LO(35))
310 #define SWC1 (HI(57))
311 #define TRUNC_W_S (HI(17) | FMT_S | LO(13))
312 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
313 #define WSBH (HI(31) | (2 << 6) | LO(32))
315 #define XOR (HI(0) | LO(38))
316 #define XORI (HI(14))
318 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
319 #define CLZ (HI(28) | LO(32))
320 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
321 #define DCLZ (LO(18))
323 #define DCLZ (HI(28) | LO(36))
324 #define MOVF (HI(0) | (0 << 16) | LO(1))
325 #define MOVF_S (HI(17) | FMT_S | (0 << 16) | LO(17))
326 #define MOVN (HI(0) | LO(11))
327 #define MOVN_S (HI(17) | FMT_S | LO(19))
328 #define MOVT (HI(0) | (1 << 16) | LO(1))
329 #define MOVT_S (HI(17) | FMT_S | (1 << 16) | LO(17))
330 #define MOVZ (HI(0) | LO(10))
331 #define MOVZ_S (HI(17) | FMT_S | LO(18))
332 #define MUL (HI(28) | LO(2))
334 #define PREF (HI(51))
335 #define PREFX (HI(19) | LO(15))
336 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
337 #define SEB (HI(31) | (16 << 6) | LO(32))
338 #define SEH (HI(31) | (24 << 6) | LO(32))
342 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
344 #define ADDIU_W ADDIU
352 #define ADDIU_W DADDIU
360 #define MOV_fmt(f) (HI(17) | f | LO(6))
362 #define SIMM_MAX (0x7fff)
363 #define SIMM_MIN (-0x8000)
364 #define UIMM_MAX (0xffff)
366 #define CPU_FEATURE_DETECTED (1 << 0)
367 #define CPU_FEATURE_FPU (1 << 1)
368 #define CPU_FEATURE_FP64 (1 << 2)
369 #define CPU_FEATURE_FR (1 << 3)
373 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32) \
374 && (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
393 #if !defined(SLJIT_IS_FPU_AVAILABLE) && defined(__GNUC__)
398 #if defined(SLJIT_IS_FPU_AVAILABLE)
399 #if SLJIT_IS_FPU_AVAILABLE
401 #if SLJIT_IS_FPU_AVAILABLE == 64
405 #elif defined(__GNUC__)
406 __asm__ (
"cfc1 %0, $0" :
"=r"(fir));
407 if ((fir & (0x3 << 16)) == (0x3 << 16))
410 #if (defined(SLJIT_CONFIG_MIPS_64) && SLJIT_CONFIG_MIPS_64) \
411 && (!defined(SLJIT_MIPS_REV) || SLJIT_MIPS_REV < 2)
415 if ((fir & (1 << 22)))
421 #if defined(SLJIT_CONFIG_MIPS_32) && SLJIT_CONFIG_MIPS_32
422 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 6
424 #elif defined(SLJIT_DETECT_FR) && SLJIT_DETECT_FR == 0
425 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 5
430 #ifndef FR_GET_FP_MODE
433 flag = prctl(PR_GET_FP_MODE);
438 #if ((defined(SLJIT_DETECT_FR) && SLJIT_DETECT_FR == 2) \
439 || (!defined(PR_GET_FP_MODE) && (!defined(SLJIT_DETECT_FR) || SLJIT_DETECT_FR >= 1))) \
440 && (defined(__GNUC__) && (defined(__mips) && __mips >= 2))
442 __asm__ (
".set oddspreg\n"
446 :
"+m" (flag) :
"m" (zero) :
"$f16",
"$f17");
466 SLJIT_ASSERT(delay_slot == MOVABLE_INS || delay_slot >= UNMOVABLE_INS
467 || (
sljit_ins)delay_slot == ((ins >> 11) & 0x1f)
468 || (
sljit_ins)delay_slot == ((ins >> 16) & 0x1f));
472 compiler->delay_slot = delay_slot;
478 if (
flags & IS_BIT26_COND)
480 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
481 if (
flags & IS_BIT23_COND)
496 #
if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
504 if (jump->
flags & JUMP_ADDR)
511 if (jump->
flags & IS_COND)
514 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
515 if (jump->
flags & IS_CALL)
520 if (jump->
flags & IS_MOVABLE) {
522 if (diff <= SIMM_MAX && diff >=
SIMM_MIN) {
523 jump->
flags |= PATCH_B;
525 if (!(jump->
flags & IS_COND)) {
527 inst[-1] = (jump->
flags & IS_JAL) ?
BAL :
B;
531 saved_inst = inst[0];
538 diff = ((
sljit_sw)target_addr - (
sljit_sw)(inst + 1) - executable_offset) >> 2;
539 if (diff <= SIMM_MAX && diff >=
SIMM_MIN) {
540 jump->
flags |= PATCH_B;
542 if (!(jump->
flags & IS_COND)) {
543 inst[0] = (jump->
flags & IS_JAL) ?
BAL :
B;
554 if (jump->
flags & IS_COND) {
556 jump->
flags |= PATCH_J;
557 saved_inst = inst[0];
559 inst[-1] = (saved_inst & 0xffff0000) | 3;
565 jump->
flags |= PATCH_J;
566 inst[0] = (inst[0] & 0xffff0000) | 3;
577 jump->
flags |= PATCH_J;
579 inst[-1] = (jump->
flags & IS_JAL) ?
JAL :
J;
585 jump->
flags |= PATCH_J;
586 inst[0] = (jump->
flags & IS_JAL) ?
JAL :
J;
592 if (jump->
flags & IS_COND)
595 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
597 if (target_addr <= 0x7fffffff) {
598 jump->
flags |= PATCH_ABS32;
599 if (jump->
flags & IS_COND)
606 if (target_addr <= 0x7fffffffffffl) {
607 jump->
flags |= PATCH_ABS48;
608 if (jump->
flags & IS_COND)
618 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
630 static __attribute__ ((noinline))
void sljit_cache_flush(
void*
code,
void* code_ptr)
636 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
643 if (jump->
flags & JUMP_ADDR)
648 if (
addr < 0x80000000l) {
649 jump->
flags |= PATCH_ABS32;
653 if (
addr < 0x800000000000l) {
654 jump->
flags |= PATCH_ABS48;
670 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
673 if (
flags & PATCH_ABS32) {
677 else if (
flags & PATCH_ABS48) {
680 ins[1] =
ORI |
S(reg) |
T(reg) |
IMM((
addr >> 16) & 0xffff);
686 ins[1] =
ORI |
S(reg) |
T(reg) |
IMM((
addr >> 32) & 0xffff);
688 ins[3] =
ORI |
S(reg) |
T(reg) |
IMM((
addr >> 16) & 0xffff);
705 SLJIT_NEXT_DEFINE_TYPES;
713 CHECK_PTR(check_sljit_generate_code(compiler));
714 reverse_buf(compiler);
716 code = (
sljit_ins*)allocate_executable_memory(compiler->
size *
sizeof(
sljit_ins), options, exec_allocator_data, &executable_offset);
723 jump = compiler->
jumps;
724 const_ = compiler->
consts;
725 SLJIT_NEXT_INIT_TYPES();
726 SLJIT_GET_NEXT_MIN();
730 buf_end = buf_ptr + (
buf->used_size >> 2);
732 *code_ptr = *buf_ptr++;
733 if (next_min_addr == word_count) {
739 if (next_min_addr == next_label_size) {
740 label->u.addr = (
sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
743 next_label_size = SLJIT_GET_NEXT_SIZE(
label);
746 if (next_min_addr == next_jump_addr) {
747 if (!(jump->
flags & JUMP_MOV_ADDR)) {
748 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
757 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
767 next_jump_addr = SLJIT_GET_NEXT_ADDRESS(jump);
768 }
else if (next_min_addr == next_const_addr) {
770 const_ = const_->
next;
771 next_const_addr = SLJIT_GET_NEXT_ADDRESS(const_);
774 SLJIT_GET_NEXT_MIN();
778 }
while (buf_ptr < buf_end);
794 jump = compiler->
jumps;
800 if (jump->
flags & PATCH_B) {
803 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((
sljit_ins)
addr & 0xffff);
806 if (jump->
flags & PATCH_J) {
824 code_ptr = (
sljit_ins *)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
830 sljit_cache_flush(
code, code_ptr);
838 switch (feature_type) {
839 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32) \
840 && (!defined(SLJIT_IS_FPU_AVAILABLE) || SLJIT_IS_FPU_AVAILABLE)
856 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
865 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
886 #define LOAD_DATA 0x01
887 #define WORD_DATA 0x00
888 #define BYTE_DATA 0x02
889 #define HALF_DATA 0x04
890 #define INT_DATA 0x06
891 #define SIGNED_DATA 0x08
894 #define DOUBLE_DATA 0x10
895 #define SINGLE_DATA 0x12
897 #define MEM_MASK 0x1f
899 #define ARG_TEST 0x00020
900 #define ALT_KEEP_CACHE 0x00040
901 #define CUMULATIVE_OP 0x00080
902 #define LOGICAL_OP 0x00100
903 #define IMM_OP 0x00200
904 #define MOVE_OP 0x00400
905 #define SRC2_IMM 0x00800
907 #define UNUSED_DEST 0x01000
908 #define REG_DEST 0x02000
909 #define REG1_SOURCE 0x04000
910 #define REG2_SOURCE 0x08000
911 #define SLOW_SRC1 0x10000
912 #define SLOW_SRC2 0x20000
913 #define SLOW_DEST 0x40000
918 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
919 #define SELECT_OP(d, w) (w)
921 #define SELECT_OP(d, w) (!(op & SLJIT_32) ? (d) : (w))
924 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
936 sljit_s32 arg_count, word_arg_count, float_arg_count;
937 sljit_s32 saved_arg_count = SLJIT_KEPT_SAVEDS_COUNT(options);
940 CHECK(check_sljit_emit_enter(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size));
941 set_emit_enter(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size);
943 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds - saved_arg_count, 1);
944 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
946 if ((local_size & SSIZE_OF(
sw)) != 0)
947 local_size += SSIZE_OF(
sw);
948 local_size += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
953 local_size += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
959 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
967 if ((arg_count & 0x1) != 0)
976 compiler->args_size = (
sljit_uw)arg_count << 2;
992 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1010 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1033 float_arg_count = 0;
1035 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1043 switch (arg_types & SLJIT_ARG_MASK) {
1046 if ((arg_count & 0x1) != 0)
1049 if (word_arg_count == 0 && float_arg_count <= 2) {
1050 if (float_arg_count == 1)
1052 }
else if (arg_count < 4) {
1055 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
1071 if (word_arg_count == 0 && float_arg_count <= 2) {
1072 if (float_arg_count == 1)
1074 }
else if (arg_count < 4)
1085 }
else if (word_arg_count != arg_count + 1 || arg_count == 0)
1086 tmp = word_arg_count;
1104 switch (arg_types & SLJIT_ARG_MASK) {
1107 if (arg_count != float_arg_count)
1109 else if (arg_count == 1)
1114 if (arg_count != float_arg_count)
1116 else if (arg_count == 1)
1125 }
else if (word_arg_count != arg_count || word_arg_count <= 1)
1126 tmp = word_arg_count;
1145 CHECK(check_sljit_set_context(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size));
1146 set_set_context(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size);
1148 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds - SLJIT_KEPT_SAVEDS_COUNT(options), 1);
1149 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1151 if ((local_size & SSIZE_OF(
sw)) != 0)
1152 local_size += SSIZE_OF(
sw);
1153 local_size += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
1158 local_size += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
1167 sljit_s32 load_return_addr = (frame_size == 0);
1174 SLJIT_ASSERT(frame_size == 1 || (frame_size & 0xf) == 0);
1179 tmp = GET_SAVED_REGISTERS_SIZE(scratches, saveds - kept_saveds_count, 1);
1180 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1182 if ((
tmp & SSIZE_OF(
sw)) != 0)
1183 tmp += SSIZE_OF(
sw);
1184 tmp += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
1187 tmp += GET_SAVED_FLOAT_REGISTERS_SIZE(fscratches, fsaveds, f64);
1191 if (local_size < frame_size) {
1193 local_size = frame_size;
1196 if (
tmp < frame_size)
1206 offset = local_size - SSIZE_OF(
sw);
1207 if (load_return_addr)
1221 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1238 if (local_size > frame_size)
1251 CHECK(check_sljit_emit_return_void(compiler));
1256 return push_inst(compiler, ins, UNMOVABLE_INS);
1265 CHECK(check_sljit_emit_return_to(compiler, src, srcw));
1268 ADJUST_LOCAL_OFFSET(src, srcw);
1282 return push_inst(compiler, ins, UNMOVABLE_INS);
1288 SLJIT_SKIP_CHECKS(compiler);
1296 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1297 #define ARCH_32_64(a, b) a
1299 #define ARCH_32_64(a, b) b
1336 if (!(arg & OFFS_REG_MASK) && argw <= SIMM_MAX && argw >=
SIMM_MIN) {
1347 #define TO_ARGW_HI(argw) (((argw) & ~0xffff) + (((argw) & 0x8000) ? 0x10000 : 0))
1356 if (arg & OFFS_REG_MASK) {
1359 if (argw && argw == next_argw && (arg == next_arg || (arg & OFFS_REG_MASK) == (next_arg & OFFS_REG_MASK)))
1364 if (arg == next_arg) {
1390 delay_slot = reg_ar;
1394 delay_slot = MOVABLE_INS;
1396 base = arg & REG_MASK;
1402 if (argw == compiler->cache_argw) {
1403 if (arg == compiler->cache_arg)
1406 if ((
SLJIT_MEM | (arg & OFFS_REG_MASK)) == compiler->cache_arg) {
1407 if (arg == next_arg && argw == (next_argw & 0x3)) {
1408 compiler->cache_arg = arg;
1409 compiler->cache_argw = argw;
1419 compiler->cache_arg =
SLJIT_MEM | (arg & OFFS_REG_MASK);
1420 compiler->cache_argw = argw;
1424 if (arg == next_arg && argw == (next_argw & 0x3)) {
1425 compiler->cache_arg = arg;
1426 compiler->cache_argw = argw;
1435 if (compiler->cache_arg == arg && argw - compiler->cache_argw <=
SIMM_MAX && argw - compiler->cache_argw >=
SIMM_MIN)
1438 if (compiler->cache_arg ==
SLJIT_MEM && (argw - compiler->cache_argw) <=
SIMM_MAX && (argw - compiler->cache_argw) >=
SIMM_MIN) {
1439 offset = argw - compiler->cache_argw;
1445 if (next_arg && next_argw - argw <= SIMM_MAX && next_argw - argw >=
SIMM_MIN && argw_hi !=
TO_ARGW_HI(next_argw)) {
1447 compiler->cache_argw = argw;
1451 compiler->cache_argw = argw_hi;
1460 if (arg == next_arg && next_argw - argw <= SIMM_MAX && next_argw - argw >=
SIMM_MIN) {
1461 compiler->cache_arg = arg;
1475 return compiler->
error;
1479 delay_slot = reg_ar;
1483 delay_slot = MOVABLE_INS;
1485 base = arg & REG_MASK;
1510 return compiler->
error;
1514 #define EMIT_LOGICAL(op_imm, op_reg) \
1515 if (flags & SRC2_IMM) { \
1516 if (op & SLJIT_SET_Z) \
1517 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
1518 if (!(flags & UNUSED_DEST)) \
1519 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
1522 if (op & SLJIT_SET_Z) \
1523 FAIL_IF(push_inst(compiler, op_reg | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
1524 if (!(flags & UNUSED_DEST)) \
1525 FAIL_IF(push_inst(compiler, op_reg | S(src1) | T(src2) | D(dst), DR(dst))); \
1528 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1530 #define EMIT_SHIFT(dimm, dimm32, imm, dv, v) \
1537 #define EMIT_SHIFT(dimm, dimm32, imm, dv, v) \
1539 op_dimm32 = (dimm32); \
1546 #if (!defined SLJIT_MIPS_REV || SLJIT_MIPS_REV < 1)
1551 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1599 #if defined(SLJIT_CONFIG_MIPS_64) && SLJIT_CONFIG_MIPS_64
1603 op = GET_OPCODE(op);
1604 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
1605 #if defined(SLJIT_CONFIG_MIPS_64) && SLJIT_CONFIG_MIPS_64
1608 return push_inst(compiler, DSHD |
T(dst) |
D(dst),
DR(dst));
1617 #if defined(SLJIT_CONFIG_MIPS_64) && SLJIT_CONFIG_MIPS_64
1622 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1664 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1676 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
1677 #if defined(SLJIT_CONFIG_MIPS_32) && SLJIT_CONFIG_MIPS_32
1698 sljit_s32 is_overflow, is_carry, carry_src_ar, is_handled, reg;
1700 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1701 sljit_ins ins, op_dimm, op_dimm32, op_dv;
1704 switch (GET_OPCODE(op)) {
1721 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1722 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
1723 return push_inst(compiler, SEB |
T(src2) |
D(dst),
DR(dst));
1729 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
1731 return push_inst(compiler, SEB |
T(src2) |
D(dst),
DR(dst));
1750 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1751 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
1752 return push_inst(compiler, SEH |
T(src2) |
D(dst),
DR(dst));
1758 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
1760 return push_inst(compiler, SEH |
T(src2) |
D(dst),
DR(dst));
1769 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1773 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
1775 return push_inst(compiler, DINSU |
T(src2) |
SA(0) | (31 << 11),
DR(dst));
1792 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
1795 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
1804 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
1823 return emit_rev(compiler, op, dst, src2);
1855 if (is_overflow || carry_src_ar != 0) {
1857 carry_src_ar =
DR(src1);
1858 else if (src2 != dst)
1859 carry_src_ar =
DR(src2);
1872 if (is_overflow || carry_src_ar != 0) {
1894 if (carry_src_ar != 0) {
1896 carry_src_ar =
DR(src1);
1897 else if (src2 != dst)
1898 carry_src_ar =
DR(src2);
1909 if (carry_src_ar != 0) {
1918 if (carry_src_ar == 0)
1956 switch (GET_FLAG_TYPE(op)) {
2001 if (is_overflow || is_carry)
2014 if (is_overflow || is_carry)
2067 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
2069 #elif (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
2070 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2084 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
2130 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 2)
2133 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2134 src2 = -src2 & 0x1f;
2136 src2 = -src2 & ((op &
SLJIT_32) ? 0x1f : 0x3f);
2145 EMIT_SHIFT(DROTR, DROTR32, ROTR, DROTRV, ROTRV);
2152 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2189 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2211 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2226 return push_inst(compiler, op_v |
S(src2) |
T(src1) |
D(dst),
DR(dst));
2235 ins = (op &
SLJIT_32) ? op_imm : op_dimm;
2245 ins = (op &
SLJIT_32) ? op_v : op_dv;
2251 return push_inst(compiler, ins |
S(src2) |
T(src1) |
D(dst),
DR(dst));
2255 #define CHECK_IMM(flags, srcw) \
2256 ((!((flags) & LOGICAL_OP) && ((srcw) <= SIMM_MAX && (srcw) >= SIMM_MIN)) \
2257 || (((flags) & LOGICAL_OP) && !((srcw) & ~UIMM_MAX)))
2274 compiler->cache_arg = 0;
2275 compiler->cache_argw = 0;
2283 else if (FAST_IS_REG(dst)) {
2287 src2_tmp_reg = dst_r;
2309 if (FAST_IS_REG(src1)) {
2330 if (FAST_IS_REG(src2)) {
2340 src2_r = src2_tmp_reg;
2358 src2_r = src2_tmp_reg;
2382 return compiler->
error;
2394 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2399 CHECK(check_sljit_emit_op0(compiler, op));
2401 op = GET_OPCODE(op);
2409 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
2410 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2420 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2433 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
2434 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2450 #if !(defined SLJIT_MIPS_REV)
2454 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2473 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
2477 if (!(src & OFFS_REG_MASK)) {
2478 if (srcw <= SIMM_MAX && srcw >=
SIMM_MIN)
2479 return push_inst(compiler, PREF |
S(src & REG_MASK) |
IMM(srcw), MOVABLE_INS);
2492 return push_inst(compiler, PREFX |
S(src & REG_MASK) |
T(OFFS_REG(src)), MOVABLE_INS);
2503 CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
2504 ADJUST_LOCAL_OFFSET(dst, dstw);
2505 ADJUST_LOCAL_OFFSET(src, srcw);
2507 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2512 switch (GET_OPCODE(op)) {
2514 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2522 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2569 CHECK(check_sljit_emit_op2(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w));
2570 ADJUST_LOCAL_OFFSET(dst, dstw);
2571 ADJUST_LOCAL_OFFSET(src1, src1w);
2572 ADJUST_LOCAL_OFFSET(src2, src2w);
2574 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2584 switch (GET_OPCODE(op)) {
2596 compiler->status_flags_state = 0;
2616 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2639 CHECK(check_sljit_emit_op2(compiler, op, 1, 0, 0, src1, src1w, src2, src2w));
2641 SLJIT_SKIP_CHECKS(compiler);
2642 return sljit_emit_op2(compiler, op, 0, 0, src1, src1w, src2, src2w);
2645 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2646 #define SELECT_OP3(op, src2w, D, D32, W) (((op & SLJIT_32) ? (W) : ((src2w) < 32) ? (D) : (D32)) | (((sljit_ins)src2w & 0x1f) << 6))
2648 #define SELECT_OP3(op, src2w, D, D32, W) ((W) | ((sljit_ins)(src2w) << 6))
2657 CHECK(check_sljit_emit_op2r(compiler, op, dst_reg, src1, src1w, src2, src2w));
2659 switch (GET_OPCODE(op)) {
2661 SLJIT_SKIP_CHECKS(compiler);
2677 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2686 CHECK(check_sljit_emit_shift_into(compiler, op, dst_reg, src1_reg, src2_reg, src3, src3w));
2690 if (src1_reg == src2_reg) {
2691 SLJIT_SKIP_CHECKS(compiler);
2695 ADJUST_LOCAL_OFFSET(src3, src3w);
2698 src3w &= bit_length - 1;
2705 src3w = bit_length - src3w;
2709 src3w = bit_length - src3w;
2721 }
else if (dst_reg == src3) {
2755 CHECK(check_sljit_emit_op_src(compiler, op, src, srcw));
2756 ADJUST_LOCAL_OFFSET(src, srcw);
2760 if (FAST_IS_REG(src))
2773 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1)
2789 CHECK(check_sljit_emit_op_dst(compiler, op, dst, dstw));
2790 ADJUST_LOCAL_OFFSET(dst, dstw);
2794 if (FAST_IS_REG(dst))
2798 dst_ar =
DR(FAST_IS_REG(dst) ? dst :
TMP_REG2);
2807 compiler->delay_slot = UNMOVABLE_INS;
2815 CHECK_REG_INDEX(check_sljit_get_register_index(
type, reg));
2832 CHECK(check_sljit_emit_op_custom(compiler, instruction,
size));
2841 #define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_32) >> 7))
2842 #define FMT(op) (FMT_S | (~(sljit_ins)op & SLJIT_32) << (21 - (5 + 3)))
2848 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2861 if (FAST_IS_REG(dst)) {
2863 #if !defined(SLJIT_MIPS_REV) || (SLJIT_CONFIG_MIPS_32 && SLJIT_MIPS_REV <= 1)
2876 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2887 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2896 #if !defined(SLJIT_MIPS_REV) || (SLJIT_CONFIG_MIPS_32 && SLJIT_MIPS_REV <= 1)
2912 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2923 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2931 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2939 #if !defined(SLJIT_MIPS_REV)
2955 #if !defined(SLJIT_MIPS_REV) || SLJIT_MIPS_REV <= 1
2961 #if (!defined SLJIT_MIPS_REV || SLJIT_MIPS_REV <= 1)
2970 #if defined(SLJIT_MIPS_REV) && SLJIT_MIPS_REV >= 2
2977 #if !defined(SLJIT_MIPS_REV) || SLJIT_MIPS_REV <= 1
2990 #if (!defined SLJIT_MIPS_REV || SLJIT_MIPS_REV <= 1)
2998 #if !defined(SLJIT_MIPS_REV)
3004 #if (!defined SLJIT_MIPS_REV || SLJIT_MIPS_REV <= 1)
3010 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
3019 #if !defined(SLJIT_MIPS_REV)
3047 switch (GET_FLAG_TYPE(op)) {
3087 compiler->cache_arg = 0;
3088 compiler->cache_argw = 0;
3091 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
3096 dst_r = FAST_IS_REG(dst) ? dst :
TMP_FREG1;
3103 switch (GET_OPCODE(op)) {
3138 CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
3139 ADJUST_LOCAL_OFFSET(dst, dstw);
3140 ADJUST_LOCAL_OFFSET(src1, src1w);
3141 ADJUST_LOCAL_OFFSET(src2, src2w);
3143 compiler->cache_arg = 0;
3144 compiler->cache_argw = 0;
3146 dst_r = FAST_IS_REG(dst) ? dst :
TMP_FREG2;
3183 switch (GET_OPCODE(op)) {
3215 CHECK(check_sljit_emit_fset32(compiler, freg,
value));
3235 CHECK_PTR(check_sljit_emit_label(compiler));
3242 set_label(
label, compiler);
3243 compiler->delay_slot = UNMOVABLE_INS;
3247 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3248 #define BRANCH_LENGTH 4
3250 #define BRANCH_LENGTH 8
3254 inst = BEQ | SA(src) | TA(0) | BRANCH_LENGTH; \
3255 flags = IS_BIT26_COND; \
3258 #define BR_NZ(src) \
3259 inst = BNE | SA(src) | TA(0) | BRANCH_LENGTH; \
3260 flags = IS_BIT26_COND; \
3263 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
3267 flags = IS_BIT23_COND; \
3268 delay_check = FCSR_FCC;
3271 flags = IS_BIT23_COND; \
3272 delay_check = FCSR_FCC;
3277 inst = BC1T | BRANCH_LENGTH; \
3278 flags = IS_BIT16_COND; \
3279 delay_check = FCSR_FCC;
3281 inst = BC1F | BRANCH_LENGTH; \
3282 flags = IS_BIT16_COND; \
3283 delay_check = FCSR_FCC;
3295 CHECK_PTR(check_sljit_emit_jump(compiler,
type));
3356 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != delay_check))
3357 jump->
flags |= IS_MOVABLE;
3365 jump->
flags |= IS_JAL;
3373 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3374 compiler->
size += 2;
3376 compiler->
size += 6;
3381 #define RESOLVE_IMM1() \
3382 if (src1 == SLJIT_IMM) { \
3384 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w)); \
3391 #define RESOLVE_IMM2() \
3392 if (src2 == SLJIT_IMM) { \
3394 PTR_FAIL_IF(load_immediate(compiler, DR(src2_tmp_reg), src2w)); \
3395 src2 = src2_tmp_reg; \
3411 CHECK_PTR(check_sljit_emit_cmp(compiler,
type, src1, src1w, src2, src2w));
3412 ADJUST_LOCAL_OFFSET(src1, src1w);
3413 ADJUST_LOCAL_OFFSET(src2, src2w);
3415 compiler->cache_arg = 0;
3416 compiler->cache_argw = 0;
3417 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3430 src2 = src2_tmp_reg;
3441 jump->
flags |= IS_BIT26_COND;
3442 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot !=
DR(src1) && compiler->delay_slot !=
DR(src2)))
3443 jump->
flags |= IS_MOVABLE;
3452 jump->
flags |= IS_BIT26_COND;
3456 jump->
flags |= IS_BIT26_COND;
3460 jump->
flags |= IS_BIT16_COND;
3464 jump->
flags |= IS_BIT16_COND;
3474 jump->
flags |= IS_BIT16_COND;
3478 jump->
flags |= IS_BIT16_COND;
3482 jump->
flags |= IS_BIT26_COND;
3486 jump->
flags |= IS_BIT26_COND;
3514 jump->
flags |= IS_BIT26_COND;
3523 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3524 compiler->
size += 2;
3526 compiler->
size += 6;
3534 #undef BRANCH_LENGTH
3545 CHECK(check_sljit_emit_ijump(compiler,
type, src, srcw));
3553 if (compiler->delay_slot != UNMOVABLE_INS)
3554 jump->
flags |= IS_MOVABLE;
3558 ADJUST_LOCAL_OFFSET(src, srcw);
3572 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3573 compiler->
size += 2;
3575 compiler->
size += 6;
3588 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
3595 CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw,
type));
3596 ADJUST_LOCAL_OFFSET(dst, dstw);
3598 op = GET_OPCODE(op);
3601 compiler->cache_arg = 0;
3602 compiler->cache_argw = 0;
3646 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 6)
3663 return emit_op_mem(compiler, mem_type, src_ar, dst, dstw);
3665 if (src_ar != dst_ar)
3678 return emit_op(compiler, saved_op, mem_type, dst, dstw, dst, dstw,
TMP_REG2, 0);
3681 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1 && SLJIT_MIPS_REV < 6)
3714 return is_float ? MOVT_S :
MOVT;
3725 return is_float ? MOVF_S : MOVF;
3739 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
3747 #if !(defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1 && SLJIT_MIPS_REV < 6)
3753 CHECK(check_sljit_emit_select(compiler,
type, dst_reg, src1, src1w, src2_reg));
3754 ADJUST_LOCAL_OFFSET(src1, src1w);
3756 #if (defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1 && SLJIT_MIPS_REV < 6)
3761 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
3769 if (dst_reg != src2_reg) {
3770 if (dst_reg == src1) {
3777 return push_inst(compiler, get_select_cc(
type, 0) |
S(src1) |
D(dst_reg),
DR(dst_reg));
3780 if (dst_reg != src2_reg) {
3781 if (dst_reg == src1) {
3786 if (ADDRESSING_DEPENDS_ON(src1, dst_reg)) {
3789 if ((src1 & REG_MASK) == dst_reg)
3790 src1 = (src1 & ~REG_MASK) |
TMP_REG1;
3792 if (OFFS_REG(src1) == dst_reg)
3793 src1 = (src1 & ~OFFS_REG_MASK) | TO_OFFS_REG(
TMP_REG1);
3800 SLJIT_SKIP_CHECKS(compiler);
3807 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
3815 SLJIT_SKIP_CHECKS(compiler);
3829 #if !(defined SLJIT_MIPS_REV && SLJIT_MIPS_REV >= 1 && SLJIT_MIPS_REV < 6)
3835 CHECK(check_sljit_emit_fselect(compiler,
type, dst_freg, src1, src1w, src2_freg));